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胡 伟
Wed, Jun 17 2015 14:39   审核人:

个人简介

现为西北工业大学自动化学院副教授,硕士生导师,分别于2005年、2008年和2012年获得该校本科、硕士和学士学位。2009年9月至2011年9月在加州大学圣迭戈分校计算机科学与工程系Ryan Kastner教授实验室作访问研究生;2014年5月至2017年5月在Kastner教授实验室作博士后研究工作。其研究方向主要包括硬件安全、形式化安全验证方法和可重构计算。

邮件:weihu@nwpu.edu.cn

电话:17795918595

西工大教师主页:http://teacher.nwpu.edu.cn/weihu.html


科学研究

硬件信息流安全、形式化安全验证、安全漏洞检测、硬件木马检测、旁路道分析


学术成果

在国内外期刊和会议上发表论文50余篇,其中CCF认定的A、B类刊物及会议论文19篇。代表性成果包括IEEE Transactions on Information Forensics & Security(信息安全领域顶级刊物) 1篇,IEEE Transactions on Computer-Aided Design of Integrated Circuits and System(CCF A类期刊) 2篇和ACM Transactions on Design Automation of Electronic systems(CCF B 类期刊)1篇,IET Information Security(CCF B类期刊)1篇,计算机辅助设计领域三大权威会议ACM/EDAC/IEEE Design Automation Conference论文3篇,IEEE/ACM International Conference on Computer Aided Design论文6篇,Design, Automation & Test in Europe Conference & Exhibition论文4篇,国内计算机领域权威刊物《计算机学报》论文1篇,出版学术专著1部(科学出版社),提交美国国家发明专利申请2项。


代表性成果:

[1] Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, and Ryan Kastner. Theoretical Analysis of Gate Level Information Flow Tracking, ACM/EDAC/IEEE Design Automation Conference (DAC), 244-247, Jun. 2010.

[2] Ryan Kastner, Jason Oberg, Wei Hu, and Ali Irturk. Enforcing Information Flow Guarantees in Reconfigurable Systems with Mix-Trusted IP, International Conference on Engineering of Reconfigurable Systems and Algorithms, Jul. 2011. (invited paper)

[3] Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu and Ryan Kastner. An Improved Encoding Technique for Gate Level Information Flow Tracking, International Workshop on Logic & Synthesis (IWLS), Jun. 2011. (oral presentation)

[4] Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, and Ryan Kastner. Information Flow Isolation in I2C and USB, ACM/EDAC/IEEE Design Automation Conference (DAC), 254-259, Jun. 2011.

[5] Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, and Ryan Kastner. Theoretical Fundamentals of Gate Level Information Flow Tracking, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 30(8): 1128-1140, Aug. 2011.

[6] Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, and Ryan Kastner. On the Complexity of Generating Gate Level Information Flow Tracking Logic, IEEE Trans. on Information Forensics and Security (TIFS), vol. 7(3): 1067-1080, Jun. 2012.

[7] Wei Hu, Jason Oberg, Dejun Mu, and Ryan Kastner. Simultaneous Information Flow Security and Circuit Redundancy in Boolean Gates, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 585-590, Nov. 2012.

[8] Tao Yang, Dejun Mu, and Wei Hu. Energy-Efficient Coverage Quality Guaranteed in Wireless Sensors Network, Applied Mathematics & Information Sciences, vol. 7(5): 1685-1691, 2013.

[9] Wei Hu, Jason Oberg, Dejun Mu, and Ryan Kastner. Expanding Gate Level Information Flow Tracking for Multi-level Security, IEEE Embedded Systems Letters (ESL), vol. 5(2): 25-28, 2013.

[10] Dejun Mu, Wei Hu, Baolei Mao, and Bo Ma. A Bottom-up Approach to Verifiable Embedded System Information Flow Security, IET Information Security, vol. 8(1): 12-17, Jan. 2014.

[11] Wei Hu, Dejun Mu, Jason Oberg, Baolei Mao, Mohit Tiwari, Timothy Sherwood, and Ryan Kastner. Gate Level Information Flow Tracking for Security Lattices, ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 20(1), Article 2, Nov. 2014.

[12] Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Jonathan Valamehr, Timothy Sherwood, Dejun Mu, and Ryan Kastner. Quantifying Timing-Based Information Flow in Cryptographic Hardware, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 552-559, Nov. 2015.

[13] Ryan Kastner, Wei Hu, and Alric Althoff. Quantifying Hardware Security Using Joint Information Flow Analysis, Design, Automation & Test in Europe Conference & Exhibition (DATE), 1523-1528, Mar. 2016. (invited paper)

[14] Wei Hu, Andrew Becker, Armita Ardeshiri, Yu Tai, Paolo Ienne, Dejun Mu, and Ryan Kastner. Imprecise Security: Quality and Complexity Tradeoffs for Hardware Information Flow Tracking, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Article 95, Nov. 2016.

[15] Wei Hu, Baolei Mao, Jason Oberg, and Ryan Kastner. Detecting Hardware Trojans with Gate-Level Information-Flow Tracking, IEEE Computer Special Issue on Security of Hardware and Software Supply Chain, vol. 49(8): 44-52, Aug. 2016.

[16] Wei Hu, Alric Althoff, Armaiti Ardeshiricham, and Ryan Kastner. Towards Property Driven Hardware Security, Microprocessor Test and Verification Conference, 51-56, December 2016. (invited paper)

[17] Armaiti Ardeshiricham, Wei Hu, Joshua Marxen and Ryan Kastner. Register Transfer Level Information Flow Tracking for Provably Secure Hardware Design, Design, Automation & Test in Europe Conference & Exhibition (DATE), 1695-1700, Mar. 2017.

[18] Andrew Becker, Wei Hu, Yu Tai, Phlip Brisk, Ryan Kastner and Paolo Ienne. Arbitrary Precision and Complexity Tradeoffs for Gate-level Information Flow Tracking, ACM/EDAC/IEEE Design Automation Conference (DAC), Article 5, June 2017.

[19] Wei Hu, Lu Zhang, Armaiti Ardeshiricham, Jeremy Blackstone, Bochuan Hou, Yu Tai and Ryan Kastner. Why You Should Care About Don’t Cares: Exploiting Internal Don’t Care Conditions for Hardware Trojans, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 707-713, Nov 2017.

[20] Armaiti Ardeshiricham, Wei Hu and Ryan Kastner. Clepsydra: Modeling Timing Flows in Hardware Designs, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 147-154, Nov 2017.

[21] Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Yu Tai, Dejun Mu, Timothy Sherwood and Ryan Kastner. Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design, IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 37(9): 1719 - 1732, 2018.

[22] Lu Zhang, Wei Hu, Armaiti Ardeshiricham, Yu Tai, Jeremy Blackstone, Dejun Mu, and Ryan Kastner. Examining the Consequences of High-Level Synthesis Optimizations on the Power Side Channel, Design, Automation & Test in Europe Conference & Exhibition (DATE), 1167-1170, March 2018.

[23] Wei Hu, Armaiti Ardeshiricham,Mustafa S Gobulukoglu, Xinmu Wang, and Ryan Kastner. Property Specific Information Flow Analysis for Hardware Security Verification, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 2018. (to appear)

[24] Wei Hu, Xinmu Wang, and Dejun Mu. Security Path Verification Through Joint Information Flow Analysis, IEEE Asia Pacific Conference on Circuits and Systems, Oct. 2018. (to appear)


学术活动

[1] 2017–2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST),大会组委会和程序委员会委员

[2] 2018 IEEE International Conference on Computer Design (ICCD), 大会程序委员会委员

[3] 2017–2019 IEEE Asian Hardware Oriented Security and Trust Symposium (AsianHOST),大会组委会和程序委员会委员

[4] 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD),大会分会主席

[5] 2017 IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP),大会程序委员会委员

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